Inventor · Boise, ID, US

Luke England

49Patents
9h-index
47Co-inventors
71Inventor score

Filing activity: Mar 14, 2007 → Aug 12, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US9536848B2 Bond pad structure for low temperature flip chip bonding Electricity 197 Active
US8937309B2 Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication Electricity 47 Active
US8421168B2 Microelectromechanical systems microphone packaging systems Electricity 36 Active
US8552567B2 Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication Electricity 32 Active
US7863096B2 Embedded die package and process flow using a pre-molded carrier Electricity 26 Active
US9153520B2 Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods Electricity 14 Active
US9865570B1 Integrated circuit package with thermally conductive pillar Electricity 13 Active
US9379091B2 Semiconductor die assemblies and semiconductor devices including same Electricity 12 Active
US10163864B1 Vertically stacked wafers and methods of forming same Electricity 12 Active
US8304896B2 Embedded die package and process flow using a pre-molded carrier Electricity 9 Active
US10224286B1 Interconnect structure with adhesive dielectric layer and methods of forming same Electricity 8 Active
US10388631B1 3D IC package with RDL interposer and related method Electricity 7 Active
US9257383B2 Method and device for an integrated trench capacitor Electricity 6 Active
US8659153B2 Pillar on pad interconnect structures, semiconductor dice and die assemblies including such interconnect structures, and related methods Electricity 6 Active
US7919410B2 Packaging methods for imager devices Electricity 6 Active
US9553080B1 Method and process for integration of TSV-middle in 3D IC stacks Electricity 5 Active
US9711494B2 Methods of fabricating semiconductor die assemblies Electricity 5 Active
US7622786B2 EMI shielding for imager devices Electricity 5 Active
US9553058B1 Wafer backside redistribution layer warpage control Electricity 4 Active
US8828798B2 Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication Electricity 3 Active
US9397073B1 Method of using a back-end-of-line connection structure to distribute current envenly among multiple TSVs in a series for delivery to a top die Electricity 3 Active
US10170389B2 Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods Electricity 3 Active
US10818570B1 Stacked semiconductor devices having dissimilar-sized dies Electricity 2 Active
US8304888B2 Integrated circuit package with embedded components Electricity 2 Active
US10083958B2 Deep trench metal-insulator-metal capacitors Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.