Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure
US7863152B2 · kind B2 · utility
5Cited by
3References
9Claims
0Family size
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Key dates
| Filing date | Feb 26, 2008 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Nov 28, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on which a strain layer dummy will be formed can be secured, thereby reducing the loading effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.