Methods for fabricating silicon carriers with conductive through-vias with low stress and low defect density

US7863189B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Veeraraghaven S. Basker · Schenectady, US
• John M. Cotte · New Fairfield, US
• Hariklia Deligianni · Alpine, US
• John U. Knickerbocker · Wappingers Falls, US
• Keith Kwietniak

Key dates

• Filing date: Jan 5, 2007
• Grant date: Jan 4, 2011
• Expiry date: Nov 3, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3025
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods are provided for fabricating silicon carriers with conductive through-vias that allow high-yield manufacture of silicon carrier with low defect density. In particular, methods are provided which enable fabrication of silicon carries with via diameters such as 1 to 10 microns in diameter for a vertical thickness of less than 10 micrometers to greater than 300 micrometers, which are capable robust to thermal-mechanical stresses during production to significantly minimize the thermal mechanical movement at the via sidewall interface between the silicon, insulator, liner and conductor materials.