Patent · US Active

Method for classifying memory cells in an integrated circuit

US7864593B2 · kind B2 · utility

3Cited by

6References

27Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Andreas Taeuber · Unterschleißheim, DE
Detlev Richter · Unterhaching, DE
Luca De Ambroggi · Dresden, DE
Konrad Seidel · Dresden, DE
Robert Petter · Berlin, DE
Marco Ziegelmayer · Freital, DE

Key dates

Filing date	Apr 12, 2007
Grant date	Jan 4, 2011
Priority date	—
Expiry date	Oct 14, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C2213/71
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for classifying memory cells in an integrated circuit is provided, wherein the integrated circuit has a memory cell field including a plurality of memory cells. The method includes determining, for each subset of the memory cells of a plurality of subsets of the memory cells, a threshold voltage distribution; determining whether the determined threshold voltage distributions fulfill a threshold voltage criterion; and depending on whether the determined threshold voltage distributions fulfill the threshold voltage criterion, classifying at least some of the non-selected memory cells.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.