Receiving device, integrated circuit, program, and receiving method
US7865218B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2005 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Jul 18, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A receiving device performs reception in a service period of a broadcast signal and switches to a power saving mode in a non-service period. The service period is composed of a first period during which an application data table of an MPE-FEC frame is transmitted and a second period, following the first period, during which an RS data table of the MPE-FEC frame is transmitted. An error correction unit 12 performs one of error correction that uses the whole RS data table according to MPE-FEC, and erasure correction that uses a same number of parity bytes as bytes having bit errors. When the bit errors are corrected by the error correction unit 12 performing erasure correction, a power control unit 30 switches a receiving circuit to a power saving mode before the second period ends.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.