Methods of manufacturing semiconductor structures
US7867912B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2007 |
| Grant date | Jan 11, 2011 |
| Priority date | — |
| Expiry date | Nov 12, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.