Method of manufacturing semiconductor device having transition metal oxide layer and related device
US7871866B2 · kind B2 · utility
8Cited by
3References
27Claims
0Family size
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Key dates
| Filing date | Jul 18, 2008 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Jul 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a method of manufacturing a semiconductor device having a switching device capable of preventing a snake current. First, a transition metal oxide layer and a leakage control layer are alternately stacked on a substrate 1 to 20 times to form a varistor layer. The transition metal oxide layer is formed to contain an excessive transition metal compared to its stable state. The leakage control layer may be formed of one selected from the group consisting of a Mg layer, a Ta layer, an Al layer, a Zr layer, a Hf layer, a polysilicon layer, a conductive carbon group layer, and a Nb layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.