Patent · US Active

Clock recovery

US7873132B2 · kind B2 · utility

4Cited by
18References
25Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 21, 2005
Grant dateJan 18, 2011
Priority date
Expiry dateJul 28, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/0025
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus of recovering a clock signal from an input data signal consistent with certain embodiments, where the clock signal has a clock cycle equal to one data bit period, involves identifying an earliest transition time position in a sequence of data signal transitions; identifying a latest transition time position in the sequence of data signal transitions; calculating an approximate average transition time of the sequence of clock transitions; calculating a sampling time for sampling data in the input data signal as the approximate average transition time plus one half clock cycle; and adjusting a sampling clock time to approximate the sampling time. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.