Jayen Desai
10Patents
4h-index
10Co-inventors
53Inventor score
Filing activity: Feb 21, 2000 → Aug 31, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7610526B2 | On-chip circuitry for bus validation | Physics | 13 | Active |
| US7498858B2 | Interpolator systems with linearity adjustments and related methods | Electricity | 6 | Expired |
| US7276952B2 | Clock signal generation using digital frequency synthesizer | Electricity | 5 | Expired |
| US9124257B2 | Digital clock placement engine apparatus and method with duty cycle correction and quadrature placement | Physics | 4 | Active |
| US7873132B2 | Clock recovery | Electricity | 4 | Active |
| US9178502B2 | Apparatus for a monotonic delay line, method for fast locking of a digital DLL with clock stop/start tolerance, apparatus and method for robust clock edge placement, and apparatus and method for clock offset tuning | Electricity | 3 | Active |
| US9628092B2 | Apparatus for a monotonic delay line, method for fast locking of a digital DLL with clock stop/start tolerance, apparatus and method for robust clock edge placement, and apparatus and method for clock offset tuning | Electricity | 3 | Active |
| US6459304B1 | Latching annihilation based logic gate | Electricity | 2 | Expired |
| US6583650B2 | Latching annihilation based logic gate | Electricity | 0 | Expired |
| US7391221B2 | On-die impedance calibration | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.