Pre-loading context states by inactive hardware thread in advance of context switch
US7873816B2 · kind B2 · utility
36Cited by
19References
21Claims
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Key dates
| Filing date | Nov 20, 2008 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Mar 19, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/461
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement and method utilize thread pair context caching, where a pair of hardware threads in a multithreaded processor, which are each capable of executing a process, are effectively paired together, at least temporarily, to perform context switching operations such as context save and/or load operations in advance of context switches performed in one or more of such paired hardware threads. By doing so, the overall latency of a context switch, where both the context for a process being switched from must be saved, and the context for the process being switched to must be loaded, may be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.