Method for analyzing component mounting board
US7873932B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2006 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Sep 25, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/0005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for analyzing a component mounting board comprising a step (A) for forming a multilayer substrate shell model of a multilayer wiring board, a step (B) for forming a multilayer component shell model divided by element division lines based on the bonding position of a component to the surface of the multilayer wiring board, step (C) for redividing the mounting position of the component in the multilayer substrate shell model, and step (D) for forming an analysis model by bonding the neutral plane of the substrate and the neutral plane of the component through one of a beam element and a solid element, i.e. a bonding element equivalent to mounting conditions of the component, wherein precision of analysis is enhanced while reducing computation cost by performing calculation while imparting boundary conditions to the analysis model.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.