Method of fabricating board having high density core layer and structure thereof
US7875809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2007 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Apr 30, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit board includes a core layer substrate having a plated through hole filled with a dielectric material. The plated through hole has a sidewall coated with an inner electroless copper layer, and an electroplated metal layer plated on the inner electroless copper layer before the plated through hole is filled with the dielectric material. The outer portion of the filled plated through hole is thicker than the center portion and tapered toward the center portion to form a depressed surface on the filled plated through hole. The core layer substrate is covered with a patterned electroless copper layer and a patterned electroplated copper layer that connect with the inner electroless copper layer and electroplated metal layer of the plated through hole. The patterned electroplated copper layer forms a flat copper pad above the plated through hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.