Electrostatic discharge protection circuit and electrostatic discharge protection method of a semiconductor memory device
US7876541B2 · kind B2 · utility
1Cited by
6References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 3, 2009 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Nov 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge (ESD) protection circuit protects a gate oxide of elements in an internal circuit against ESD. During an ESD test, if the sum of driving voltages of ESD protectors connected between a power pad and a ground pad is higher than the gate oxide breakdown voltage of elements in the internal circuit, the structure of the ESD protector is changed or another ESD protector is additionally provided so as to protect the gate oxide of the elements in the internal circuit against ESD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.