Method of obtaining enhanced localized thermal interface regions by particle stacking
US7876565B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2008 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Mar 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15788
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit-chip hot spot temperatures are reduced by providing localized regions of higher thermal conductivity in the conductive material interface at pre-designed locations by controlling how particles in the thermal paste stack- or pile-up during the pressing or squeezing of excess material from the interface. Nested channels are used to efficiently decrease the thermal resistance in the interface, by both allowing for the thermally conductive material with a higher particle volumetric fill to be used and by creating localized regions of densely packed particles between two surfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.