Non-volatile memory with reduced leakage current for unselected blocks and method for operating same
US7876618B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2009 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Jul 20, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device with reduced leakage current during programming and sense operations, and a method for operating such a memory device. In a non-volatile memory device, current leakage at the drain select gates of NAND strings can occur in unselected blocks when a selected block undergoes a program or read operation, and the bit lines are shared by the blocks. In one approach, in which a common transfer gate driver is provided for both blocks, the drain select gates are pre-charged at an optimum level, which minimizes leakage, and subsequently floated while a program or read voltage is applied to a selected word line in the selected block. In another approach, a separate transfer gate driver is provided for the unselected block so that the optimal select gate voltage can be driven in the unselected block, even while the program or read voltage is applied in the selected block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.