Memory configuration and method for calibrating read/write data based on performance characteristics of the memory configuration
US7877564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2007 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Jan 19, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.