Patent · US Active

Power mode control method and circuitry

US7877619B2 · kind B2 · utility

2Cited by

5References

20Claims

0Family size

Inventors

Ramana Rachakonda · Austin, US
Blaise Fanning · Folsom, US
Anil K. Sabbavarapu · Austin, US
Belliappa Kuttanna · Austin, US
Rajesh Patel · San Francisco, US
Kenneth D. Shoemaker · Los Altos Hills, US
Lance Hacking · Spanish Fork, US
Bruce L. Fleming · معلمی نژاد, US
Ashish V. Choubal · Austin, US

Key dates

Filing date	Dec 31, 2007
Grant date	Jan 25, 2011
Priority date	—
Expiry date	Aug 12, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F1/3203
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In some embodiments, a power up (or power mode) interface is provided whereby a chip's power up signals are encoded into multiple states to provide more functions than the number of signals used to define the states.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.