Electronic component manufacturing method
US7879679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2008 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | Oct 10, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D8/045
Abstract
A method for manufacturing an electronic component on a semiconductor substrate, including forming at least one opening in the substrate; forming in the bottom and on the walls of the opening and on the substrate an alternated succession of layers of a first material and of a second material, the second material being selectively etchable with respect to the first material and the substrate; trimming the layer portions of the first material and of the second material which are not located in the opening; selectively etching a portion of the first material to obtain trenches; and filling the trenches with at least one third material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.