Destructor integrated circuit chip, interposer electronic device and methods
US7880248B1 · kind B1 · utility
42Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2009 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | Apr 25, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/922
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device. The device includes a substrate and an integrated circuit chip. The device also includes an electrically or thermally reactive layer located between a top surface of the substrate and a bottom surface of the integrated circuit chip, wherein the reactive layer is positioned such that detection of tampering causes the reactive layer to be electrically or thermally energized such that the semiconductor device is at least partially destroyed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.