Fault tolerant integrated circuit architecture

US7880497B2 · kind B2 · utility

Assignee

• Element CXI, LLC · US

Inventors

• Steven Hennick Kelem · Los Altos Hills, US
• Jaime Cummins · Bainbridge Island, US
• John L. Watson · Carlsbad, US
• Robert Plunkett · Sunnyvale, US
• Stephen L. Wasson · East Garrison, US
• Brian A. Box · Seabrook, US
• Enno Wein · San Jose, US
• Charles A. Furciniti · Bedford, US
• Christopher E. Phillips · San Jose, US

Key dates

• Filing date: May 8, 2009
• Grant date: Feb 1, 2011
• Expiry date: May 8, 2029

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation.