Patent · US Active

Delayed-locked loop with power-saving function

US7880517B2 · kind B2 · utility

2Cited by

0References

10Claims

0Family size

Assignee

Etron Technology, Inc. · TW

Inventors

Chun Shiah · Hsinchu, TW
Chun-Peng Wu · Hsinchu, TW
Hsien-Sheng Huang · Hsinchu, TW

Key dates

Filing date	Oct 16, 2008
Grant date	Feb 1, 2011
Priority date	—
Expiry date	Oct 16, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/0891
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A DLL with power-saving function includes a VCDL, a voltage control module, a capacitor, and a phase detector. The VCDL generates a delayed clock signal according to the voltage on the capacitor and a reference clock signal. The phase detector detects phase difference between the delayed clock signal and the reference clock signal and accordingly controls the voltage controller. The voltage controller sinks or sources current to the capacitor for adjusting the voltage on the capacitor. Further, the voltage controller can turn off its charge pump according to a turned-off signal and stops sinking or sourcing current for saving power.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.