System and method for use of on-chip non-volatile memory write cache
US7882299B2 · kind B2 · utility
14Cited by
73References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2004 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | May 1, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a non-volatile memory array using an on-chip write cache is disclosed. Individual data packets received by the memory system are stored in cache memory. More than one data packet may be stored in this way and then programmed to a single page of the non-volatile array. This results in more efficient use of storage space in the non-volatile array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.