Semiconductor device and fabrication method thereof
US7884423B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 6, 2008 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Jan 28, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
CMISFETs having a symmetrical flat band voltage, the same gate electrode material, and a high permittivity dielectric layer is provided for a semiconductor device including n-MISFETs and p-MISFETs, and a fabrication method thereof, the n-MISFETs including: a first metal oxide layer 20, placed on the 1st gate insulating film 16, having a composition ratio shown with M1xM2yO (where M1=Y, La, Ce, Pr, Nd, Sm, Gd, Th, Dy, Ho, Er, Tm, Yb or Lu, M2=Hf, Zr or Ta, and x/(x+y)>0.12); a second metal oxide layer 24; and a second metal oxide layer 24, the p-MISFETs including: a second gate insulating film 18 placed on the surface of the semiconductor substrate 10; a third metal oxide layer 22, placed on the 2nd gate insulating film 18, having a composition ratio shown with M3zM4wO (M3=Al, M4=Hf, Zr or Ta, and z/(z+w)>0.14); a fourth metal oxide layer 26; and a second conductive layer 30 placed on the fourth metal oxide layer 26.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.