3D electronic packaging structure having a conductive support substrate
US7884464B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2006 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Feb 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1517
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a 3D electronic packaging unit having a conductive supporting substrate that can achieve multi-chip stacking through the signal contacts on the both sides of the unit. The packaging unit can be batched manufactured on wafers or substrates, and thus reduce the manufacturing cost of each individual packaging unit; moreover, the conductive supporting substrate can be utilized to provide signal transmission of the electronic elements, and the supporting substrate can be used as a ground terminal for the carried electronic elements to enhance electric performance of the electronic elements. The supporting substrate is also a good thermal conductor that can release effectively heat energy generated by the electronic elements and accumulated inside the package to the outside of the package along the substrate to enhance reliability of the packaging structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.