Conductor structure including manganese oxide capping layer
US7884475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2007 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Dec 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic structure includes a dielectric layer located over a substrate. The dielectric layer is separated from a copper containing conductor layer by an oxidation barrier layer. The microelectronic structure also includes a manganese oxide layer located aligned upon a portion of the copper containing conductor layer not adjoining the oxidation barrier layer. A method for fabricating the microelectronic structure includes sequentially forming and sequentially planarizing within an aperture within a dielectric layer an oxidation barrier layer, a manganese containing layer (or alternatively a mobile and oxidizable material layer) and finally, a planarized copper containing conductor layer (or alternatively a base material layer comprising a material less mobile and oxidizable than the mobile and oxidizable material layer) to completely fill the aperture. The manganese layer and the planarized copper containing conductor layer are then thermally oxidized to form a manganese oxide layer self aligned to a portion of the copper containing conductor layer not adjoining the oxidation barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.