Phase mixer and delay locked loop including the same
US7884659B2 · kind B2 · utility
8Cited by
9References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2008 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Jan 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00065
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase mixer includes a phase mixing unit configured to mix a phase of a first input signal and a phase of a second input signal in response to a phase control signal and output a phase mixed signal whose phase is varied by one or more units of a unit phase value, and a phase value adjusting unit configured to control an operation of the phrase mixing unit so that the unit phase value is adjusted in response to a code signal coding at least one of a process, voltage, or temperature (PVT) variation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.