Bipolar transistor with dual shallow trench isolation and low base resistance

US7888745B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Marwan H. Khater · New York, US
• Andreas D. Stricker · South Burlington, US
• Bradley A. Orner · Saint Albans, US
• Mattias E. Dahlstrom · Mill Valley, US

Key dates

• Filing date: Jun 21, 2006
• Grant date: Feb 15, 2011
• Expiry date: Oct 30, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D10/021

Abstract

An improved bipolar transistor with dual shallow trench isolation for reducing the parasitic component of the base to collector capacitance Ccb and base resistance Rb is provided. The structure includes a semiconductor substrate having at least a pair of neighboring first shallow trench isolation (STI) regions disposed therein. The pair of neighboring first STI regions defines an active area in the substrate. The structure also includes a collector disposed in the in the active area of the semiconductor substrate, a base layer disposed atop a surface of the semiconductor substrate in the active area, and a raised extrinsic base disposed on the base layer. In accordance with the present, the raised extrinsic base has an opening to a portion of the base layer. An emitter is located in the opening and extending on a portion of the patterned raised extrinsic base; the emitter is spaced apart and isolated from the raised extrinsic base. Moreover, and in addition to the first STI region, a second shallow trench isolation (STI) region is present in the semiconductor substrate which extends inward from each pair of said first shallow trench isolation regions towards said collector. The sec…