Enhancement of input/output for non source-synchronous interfaces
US7888966B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2010 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Mar 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface for use of device whose core circuitry operates in one voltage domain, but exchanges signal with another device (or “host”) according a different voltage domain, and the use of such an interface for supplying data using a double data rate (DDR) transfer, is presented. One concrete example of this situation is a memory card, where the internal circuitry uses one voltage range for its core operating voltages, but exchanges signals with a host using different, input/output voltage range. According to a general set of aspects, the interface receives data signals from the device at the device's core operating voltage domain, individually level shifts these to the input/output voltage domain, and then combines them into a DDR signal for transfer to the host device, where a (non-level shifted) clock signal from the host device is used as the select signal to form the DDR data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.