Transistor of semiconductor device and method of fabricating the same
US7893462B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2005 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Jul 23, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
Abstract
Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.