Dynamic segment sparing and repair in a memory system
US7895374B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2008 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Feb 10, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A communication interface device, system, method, and design structure for providing dynamic segment sparing and repair in a memory system. The communication interface device includes drive-side switching logic including driver multiplexers to select driver data for transmitting on link segments of a bus, and receive-side switching logic including receiver multiplexers to select received data from the link segments of the bus. The bus includes multiple data link segments, a clock link segment, and at least two spare link segments selectable by the drive-side switching logic and the receive-side switching logic to replace one or more of the data link segments and the clock link segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.