Patent · US Active

Secure power-on reset engine

US7895426B2 · kind B2 · utility

6Cited by

8References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Ingemar Holm · Stuttgart, DE
Ralph C. Koester · Lörrach, DE
Cedric Lichtenau · Stuttgart, DE
Thomas Pflueger · Echterdingen, DE
Mack W. Riley · Austin, US

Key dates

Filing date	Aug 24, 2007
Grant date	Feb 22, 2011
Priority date	—
Expiry date	Oct 12, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F21/71
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A secure Power-on Reset (POR) engine is provided, inside a processor chip, which guarantees a secure initialization of the chip to enable secure code execution. External access to chip resources is limited to a very few targeted settings that do not compromise the chip security. The POR engine comprises a small state machine that runs through a predefined sequence coded in persistent memory contained in the processor chip. The state machine initializes the chip and allows external access from an external processor to only some scan chains of the processor chip in order to configure interfaces, and the like, without compromising the chip security. The state machine also manages the encryption keys that are used to verify that the code, fetched by the processor to complete the initialization in software, is not modified by a third party.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.