Patent · US Active

Semiconductor device test system with test interface means

US7895486B2 · kind B2 · utility

3Cited by

6References

17Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventor

Harry Siebert · Germering, DE

Key dates

Filing date	Aug 31, 2006
Grant date	Feb 22, 2011
Priority date	—
Expiry date	Nov 11, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/48
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A semiconductor device test system has an interface for use with a semiconductor device test method, and a semiconductor device test method. In a first mode of an interface, in reaction to test signals corresponding to a test standard, for example, a JTAG test standard, and received by the interface from a test device, the interface outputs signals corresponding to the test standard to a semiconductor device to be tested. In a second mode of the interface, in reaction to test signals corresponding to the test standard and received by the interface from a test device, the interface outputs signals that do not correspond to the test standard to a semiconductor device to be tested.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.