Multi-level programmable PCRAM memory
US7897953B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 16, 2008 |
| Grant date | Mar 1, 2011 |
| Priority date | — |
| Expiry date | Dec 15, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A series of phase change material layers sandwiched between a bottom electrode and a top electrode may have different phase change temperatures selected to provide a memory device having three or more discrete resistance levels, and thus three or more discrete logic levels. The non-volatile memory device may be formed with diodes providing the thermal energy for the phase changes that program the device logic level. The non-volatile memory may form part of a logic device and/or a memory array device, as well as other devices and systems. The phase change material layers may be formed using physical deposition methods, chemical deposition methods, or using atomic layer deposition. Atomic layer deposition may reduce the overall device thermal exposure and provide improved layer thickness uniformity and sharp material boundaries at the interface of different phase change materials, thus providing improved resistance level accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.