Integrated circuits and methods with two types of decoupling capacitors
US7898013B2 · kind B2 · utility
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2References
14Claims
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Key dates
| Filing date | Dec 31, 2007 |
| Grant date | Mar 1, 2011 |
| Priority date | — |
| Expiry date | Apr 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/217
Abstract
Methods and systems for optimal decoupling capacitance in a dual-voltage power-island architecture. In low-voltage areas of the chip, accumulation capacitors of two different types are used for decoupling, depending on whether the capacitor is located in an area which is always-on or an area which is conditionally powered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.