Dual gate FinFET

US7898040B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventor

• Muhammad Nawaz · Dammam, SA

Key dates

• Filing date: Jun 18, 2007
• Grant date: Mar 1, 2011
• Expiry date: Jan 22, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6733

Abstract

A circuit has a fin supported by a substrate. A source is formed at a first end of the fin and a drain is formed at a second end of the fin. A pair of independently accessible gates are laterally spaced along the fin between the source and the drain. Each gate is formed around approximately three sides of the fin.