Fabrication method of semiconductor integrated circuit device
US7901958B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2010 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Aug 10, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.