Power IC device and method of manufacturing same
US7902595B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 31, 2007 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Jul 14, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
Abstract
In one embodiment of the present invention, a power IC device is disclosed containing a power MOS transistor with a low ON resistance and a surface channel MOS transistor with a high operation speed. There is also provided a method of manufacturing such a device. A chip has a surface of which the planar direction is not less than −8° and not more than +8° off a silicon crystal face. The p-channel trench power MOS transistor includes a trench formed vertically from the surface of the chip, a gate region in the trench, an inversion channel region on a side wall of the trench, a source region in a surface layer of the chip, and a drain region in a back surface layer of the chip. The surface channel MOS transistor has an inversion channel region fabricated so that an inversion channel current flows in a direction not less than −8° and not more than +8° off the silicon crystal direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.