Integrated circuit micro-module
US7902661B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2009 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Dec 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various apparatuses and methods for forming integrated circuit packages are described. One aspect of the invention pertains to an integrated circuit package in which one or more integrated circuits are embedded in a substrate and covered with a layer of photo-imageable epoxy. The substrate can be made of various materials, including silicon, quartz and glass. An integrated circuit is positioned within a cavity in the top surface of the substrate. The epoxy layer is formed over the top surface of the substrate and the active face of the integrated circuit. An interconnect layer is formed over the epoxy layer and is electrically coupled with the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.