Compensated output buffer for improving slew control rate
US7902885B2 · kind B2 · utility
7Cited by
17References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2007 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Dec 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The disclosure relates a compensated output buffer circuit providing an improved slew rate control and a method for minimizing the variations in the current slew rate of the buffer over process, voltage and temperature (PVT) conditions. The output buffer circuit includes a split-gate compensated driver and a slew rate control circuit. Accordingly, a desired slew rate can be maintained with fewer variations over wide range of variations in PVT conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.