CMOS circuit leakage current calculator
US7904847B2 · kind B2 · utility
1Cited by
20References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2008 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Jan 26, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This invention provides a method for determining leakage current in a CMOS circuit having several devices. It includes the steps of reading a netlist which describes the circuit and includes information on both these devices in the circuit and how these devices are interconnected. Next, an input signal state data file is generated which provides all of the possible input states for the circuit. A determination is made of which devices in the circuit are in an OFF state for each of the input signal states provided. Then the leakage current for each of these devices in the OFF state is computed for each of the input signal states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.