Method and mechanism for performing clearance-based zoning
US7904862B2 · kind B2 · utility
3Cited by
15References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 26, 2007 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Jun 12, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and mechanism is disclosed for identifying spacing and clearance based rule violations in an IC design. Shadows are employed to identify spacing and clearance based rule violations. The shadow approach of is particularly useful to identify width-dependent spacing and clearance violations, while avoiding false positives that exist with alternate approaches. The embodiments can be used with any type, configuration, or shape of layout objects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.