Fin field effect transistor having low leakage current and method of manufacturing the FinFET
US7906814B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 27, 2007 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | Mar 27, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6213
Abstract
Provided is a fin field effect transistor (FinFET) having low leakage current and a method of manufacturing the same. The FinFET includes: a bulk silicon substrate; a fence-shaped body formed by patterning the substrate; an insulating layer formed on a surface of the substrate to a first height of the fence-shaped body; a gate insulating layer formed at side walls and an upper surface of the fence-shaped body at which the insulating layer is not formed; a gate electrode formed on the gate insulating layer; source/drain formed at regions of the fence-shaped body where the gate electrode is not formed. The gate electrode includes first and second gate electrodes which are in contact with each other and have different work functions. Particularly, the second gate electrode having a low work function is disposed to be close to the drain. As a result, the FinFET according to the present invention increases a threshold voltage by using a material having the high work function for the gate electrode and lowers the work function of the gate electrode overlapping with the drain, so that gate induced drain leakage (GIDL) can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.