Hardware accelerated reconfigurable processor for accelerating database operations and queries
US7908259B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2007 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | Oct 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/2453
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a hardware accelerator that assists a host database system in processing its queries. The hardware accelerator comprises special purpose processing elements that are capable of receiving database query/operation tasks in the form of machine code database instructions, execute them in hardware without software, and return the query/operation result back to the host system. For example, table and column descriptors are embedded in the machine code database instructions. For ease of installation, the hardware accelerators employ a standard interconnect, such as a PCIe or HT interconnect. The processing elements implement a novel dataflow design and Inter Macro-Op Communication (IMC) data structures to execute the machine code database instructions. The hardware accelerator may also comprise a relatively large memory to enhance the hardware execution of the query/operation tasks requested. The hardware accelerator utilizes hardware-friendly memory addressing, which allows for arithmetic derivation of a physical address from a global database virtual address simply based on a row identifier. The hardware accelerator minimizes memory reads/wri…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.