Method for executing power on self test on a computer system and updating SMBIOS information partially
US7908469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2007 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | Nov 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for executing the power on self test (POST) on the computer system and a method for updating the SMBIOS information partially are provided for a computer system with a first memory and a second memory, wherein the first memory comprises a first storage block and a second storage block. A user can previously set the specific SMBIOS information in the second storage block. And during the POST stage, the default SMBIOS information in the BIOS code loaded from the first storage block to the second memory will be partially updated according to the specific SMBIOS information set by the user. As a result, the purpose of using the appropriated SMBIOS information to initiate the computer system can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.