Method and structure for fabricating III-V nitride layers on silicon substrates
US7910937B2 · kind B2 · utility
20Cited by
2References
14Claims
0Family size
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Key dates
| Filing date | Feb 1, 2006 |
| Grant date | Mar 22, 2011 |
| Priority date | — |
| Expiry date | Apr 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure for fabricating III-V nitride layers on silicon substrates includes a substrate, a transition structure having AlGaN, AlN and GaN layers, and a superlattice structure having AlGaN and GaN layers. In the invention, the large lattice mismatch (17%) between GaN and silicon is solved by using AlN as the first buffer layer with a 5:4 coincidence between AlN(0001) and Si(111) lattice to reduce the lattice mismatch to 1.3%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.