Nanotube logic circuits
US7911234B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2008 |
| Grant date | Mar 22, 2011 |
| Priority date | — |
| Expiry date | Sep 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/221
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A logic cell that is immune to misaligned carbon nanotubes. Carbon nanotubes are positioned on a substrate. Contacts are formed on a layer of carbon nanotubes, including a first input contact, a second input contact, an output contact, a first gate region, and a second gate region. The output contact is positioned between the first input contact and the second input contact, and a cell region is provided bounded by a width of the output contact and residing between the first input contact and the second input contact. A nonconductive region is positioned in the layer of carbon nanotubes between any two or more of the plurality of contacts that, if shorted, would inhibit a logic function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.