Subhasish Mitra
20Patents
8h-index
27Co-inventors
75Inventor score
Filing activity: Aug 8, 2001 → Jul 30, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7278074B2 | System and shadow circuits with output joining circuit | Physics | 29 | Expired |
| US7188284B2 | Error detecting circuit | Physics | 25 | Expired |
| US7185253B2 | Compacting circuit responses | Physics | 23 | Expired |
| US7278076B2 | System and scanout circuits with error resilience circuit | Physics | 22 | Expired |
| US6910173B2 | Word voter for redundant systems | Physics | 17 | Expired |
| US7373572B2 | System pulse latch and shadow pulse latch coupled to output joining circuit | Electricity | 16 | Active |
| US7409631B2 | Error-detection flip-flop | Physics | 14 | Active |
| US7523371B2 | System and shadow bistable circuits coupled to output joining circuit | Physics | 8 | Active |
| US9928150B2 | System and method for testing a logic-based processing device | Physics | 4 | Active |
| US10528448B2 | Post-silicon validation and debug using symbolic quick error detection | Physics | 2 | Active |
| US9748421B2 | Multiple carbon nanotube transfer and its applications for making high-performance carbon nanotube field-effect transistor (CNFET), transparent electrodes, and three-dimensional integration of CNFETs | Emerging Cross-Sectional Technologies | 1 | Active |
| US8065634B1 | System and method for analyzing a nanotube logic circuit | Electricity | 1 | Active |
| US11217307B2 | Circuit and method for programming resistive memory cells | Physics | 0 | Active |
| US7814383B2 | Compacting circuit responses | Physics | 0 | Active |
| US7574640B2 | Compacting circuit responses | Physics | 0 | Expired |
| US10546079B2 | System-level validation of systems-on-a-chip (SoC) | Physics | 0 | Active |
| US12300347B2 | Reconfigurable memory module designed to implement computing operations | Physics | 0 | Active |
| US7911234B1 | Nanotube logic circuits | Electricity | 0 | Active |
| US7240260B2 | Stimulus generation | Physics | 0 | Expired |
| US10120737B2 | Apparatus for detecting bugs in logic-based processing devices | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.