Systems and methods for super-threading
US7913194B1 · kind B1 · utility
18Cited by
3References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 31, 2007 |
| Grant date | Mar 22, 2011 |
| Priority date | — |
| Expiry date | Dec 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment of the invention, a method is disclosed including receiving a netlist of an integrated circuit design; executing a first copy of an integrated circuit design program with a first processor associated with a first memory space to independently perform work on a first portion of the integrated circuit design; and executing a second copy of the integrated circuit design program with a second processor associated with a second memory space to independently perform work on a second portion of the integrated circuit design; wherein the second memory space is independent of the first memory space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.