Inventor · Cupertino, CA, US

Denis Baylor

14Patents

6h-index

15Co-inventors

63Inventor score

Filing activity: Jun 8, 1998 → Mar 30, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US6237127A	Static timing analysis of digital electronic circuits using non-default constraints known as exceptions	Physics	32	Expired
US7913194B1	Systems and methods for super-threading	Physics	18	Active
US9501506B1	Indexing system	Physics	14	Active
US8065640B1	Systems and methods for reduced test case generation	Physics	9	Active
US8127260B1	Physical layout estimator	Physics	8	Active
US8560984B1	Methods and systsm for physical layout estimation	Physics	6	Active
US8386978B1	Software and systems for physical layout estimation	Physics	4	Active
US9483568B1	Indexing system	Physics	3	Active
US8375350B1	Methods for reduced test case generation	Physics	1	Active
US8954905B1	Methods for physical layout estimation	Physics	0	Active
US12174780B2	Synchronization in multi-chip systems	Electricity	0	Active
US11372801B2	Synchronization in multi-chip systems	Electricity	0	Active
US12032511B2	Synchronization in multi-chip systems	Electricity	0	Active
US8694931B1	Systems and methods for super-threading of integrated circuit design programs	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.