Image sensor monitor structure in scribe area

US7915056B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• John J. Ellis-Monaghan · Grand Isle, US
• Mark D. Jaffe · Shelburne, US
• Sambasivan Narayan · South Burlington, US
• Anthony J. Perri · Jericho, US
• Richard J. Rassel · Tappahannock, US
• Tian Xia · Shanghai, CN

Key dates

• Filing date: Mar 20, 2008
• Grant date: Mar 29, 2011
• Expiry date: Jan 1, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A semiconductor die including a semiconductor chip and a test structure, located in a scribe area, is designed and manufactured. The test structure includes an array of complementary metal oxide semiconductor (CMOS) image sensors that are of the same type as CMOS image sensors employed in another array in the semiconductor chip and having a larger array size. Such a test structure is provided in a design phase by providing a design structure in which the orientations of the CMOS image sensors match between the two arrays. The test structure provides effective and accurate monitoring of manufacturing processes through in-line testing before a final test on the semiconductor chip.